This job board retrieves part of its jobs from: Oklahoma Jobs | Massachusetts Jobs | New Jersey Jobs

  Spokane Jobs Hub  

Bringing the best, highest paying job offers near you

previous arrow
next arrow

Physical Design For Arrays And Yield Test-vehicles


This is a Full-time position in Spokane, WA posted April 8, 2021.

PHYSICAL DESIGN FOR ARRAYS AND YIELD TEST-VEHICLES United States New Information Technology 8 hours agoPost Date 21201035Requisition # Apply for JobShare this JobSign Up for Job Alerts CTG is seeking to fill aPhysical Design for Arrays and Yield Test-Vehiclesopeningfor our Fortune 100 client.

Location: Remote Duration: 1 year Our client has a need for a capable layout engineer with strong experience in VLSI custom layout.

This layout engineer will deliver highly compact custom layout with tight area and pitch requirements, communicate with designers to close on parasitic extractions, and integrate custom layout components into basic building blocks that can be assembled either manually or using a place and route framework.

The technology will combine front-end VLSI fabrication at an advanced (FinFET) technology node in a commercial foundry with novel back-end processing.

Job Duties: Consult with stakeholders (testsite architect, circuit designers, design enablement team) to develop an area floorplan for delivering highly compact yet robust layout for the custom designed circuits.

Execute on layout, DRC, and LVS efforts for array and yield-test vehicles, involving understanding circuit schematics, modifying components from previous layout, and integrating the final layout blocks within the designated area footprint.

Working across multiple time-zones, including US Eastern Standard Time, Pacific Standard Time, and Central European Standard Time, is required.

Report progress regularly to tech lead.

Prepare documentations for DRC waiver requests if needed.

Skills Required: Extensive experience (at least 4 years) with full-custom-layout and LVS of VLSI circuitry in advanced (FinFET) nodes is mandatory.

This includes experience with floor planning, power-grids, schematic and layout tools (Virtuoso), and layout verification (DRC/LVS).

Strong verbal and written communication skills are required, including the ability to communicate both progress and problems compactly (e.g., capable of either summarizing or presenting in full detail, as needed).

Some experience (2 years or more) with analog non-volatile memory (RRAM, PCM) is desirable.

Excellent verbal and written English communication skills and the ability to interact professionally with a diverse group is required.

CTG does not accept unsolicited resumes from headhunters, recruitment agencies, or fee based recruitment services for this role.

Please add your adsense or publicity code here (inc/structure/adsfooter.php)